Computer Architecture Engineer · University of Michigan Course Project
LC-2K Cache Simulator
A configurable set-associative cache integrated with an LC-2K processor simulator to model real memory behavior.
Overview
What I built
The simulator places a configurable cache between an LC-2K processor and main memory. It decodes addresses into tags, set indexes, and block offsets, then models cache hits, misses, block fills, and evictions across different block sizes and associativity settings.